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Realistic fault modelling to enable optimization of low power IoT and Cognitive fault-tolerant computing systems [Clear]

# Title Funder Funding Start End Status
61 Design, build and testing of a 50 kVA SiC BJT inverter as a building block for high-power HVDC inverters EPSRC
£260,200
 Aug. 24, 2016 Nov. 24, 2016 Closed
62 Control Interface for QUantum Integrated Technology Arrays EPSRC
£1,943,648
 Sept. 30, 2020 Sept. 29, 2023 Active
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