Dramatic improvements in capacity (as much as 1000x the current level) and spectral efficiency needed for future wireless communication systems to accommodate the rapidly increasing number of wireless electronic gadgets and users who require access to ubiquitous high-speed wireless links can be achieved by adopting millimetre-wave (mmW) massive multiple-input multiple-output (MIMO) technologies.

The realization of mmW massive MIMO requires a radical change in base station architecture wherein hundreds of power amplifiers are required to feed a large array of small antennas. The development of mmW massive MIMO transceivers has been to date hampered by the power amplifiers poor efficiency and high implementation cost.

Nonlinear switch-mode power amplifiers (SMPAs) such as Class E and F offer high efficiency but require fast (power-hungry, expensive) transistors to allow the generation of higher order harmonics. Moreover, abrupt drop during ON-to-OFF or OFF-to-ON transition in the idealised switch current or voltage waveform of existing SMPA topologies results in substantial power dissipation in the practical implementation hence reduces the PA efficiency.

The proposed research ambitiously aims to produce a new type of highly-efficient highly-linear power amplifier that offers true soft-switching characteristics to permit the use of low-cost slow-switching transistors for effective deployment in mmW massive MIMO systems. This will be achieved through holistic design approach to tackle multiple-level impediments encompassing different aspects of current technologies, by applying ZVS-ZVDS and ZCS-ZCDS conditions simultaneously to alleviate the abrupt drop in the switch current/voltage waveform, using nonlinear negative feedback to mitigate charge accumulation at the gate, and adopting geometric programming to optimise device layout and interconnect in order to minimise degradation in maximum oscillation frequency (fMAX).

Successes in this project will therefore bridge the gap between theory and implementation of mmW massive MIMO systems by realistically considering blended hardware-financial constraints, and will lay new scientific foundations that advance the state-of-the-art methods for designing low-cost high-efficiency mmW PAs. Specifically, the knowledge derived from this research will contribute to the hardware development of 5G infrastructures that will underpin the way we communicate, work and live. Importantly, the proposed concepts will be robustly validated through IC prototype implemented using CMOS technology, and high-precision measurements.

This project is supported by the UK Engineering & Physical Sciences Research Council (EPSRC), and will be carried out in close collaboration with one of the world largest semiconductor companies with core expertise in integrated circuit design.