Solution-Processed Inorganic Thin-Film Photovoltaic Devices (SolPV)

5bfede0a-a876-4870-8abf-f884365d37fd

Active

EPSRC
EPSRC
EPSRC
EPSRC
EPSRC

£4,314,900

July 31, 2021

Jan. 31, 2025

The Clean Growth Strategy, a core element of the UK Industrial Strategy, aims at delivering a high-tech vibrant low-carbon economy. The UK has two legally binding targets in the medium term which requires urgent drastic action,: (i) clean, smart and flexible power to deliver 80% of electricity generation by 2032 and (ii) 'net-zero' carbon emission by 2050 in every aspect of the economy. The effective integration of renewable energy sources in every sector is crucial, with solar energy playing a central role in this transformation.

A key area of expansion in the field of solar conversion to electrical energy, known as photovoltaic (PV), is the integration in building and infrastructure in highly urbanised environments. For instance, the size of the building-integrated PV industry is reaching over $2Bn in the US alone. While mature Si technologies will continue to dominate utility-scale electricity generation, system-integrated PV requires technologies based on thin-film semiconductor materials which can be deposited onto a variety of substrates. SolPV will investigate the science of manufacturing PV devices based on the two leading inorganic thin-film technologies, Cu(In,Ga)(S,Se)2 (CIGS) and Cu2ZnSn(S,Se)4 (CZTS), based on scalable solution processes.

SolPV aims at taking the performance of solution-processed CIGS and CZTS devices to power conversion efficiencies above 15% using scalable manufacturing routes and Cd-free architectures. Conventional CIGS and CZTS device architecture (commonly referred to as 'substrate') consists of soda-lime glass/Mo/absorber/CdS/i-ZnO/Al:ZnO. The SolPV strategy involves:
1- optimisation of the absorber precursor formulation to implement scalable manufacturing methods such as slot-dye and bar-coating,
2- design thermal processing strategies to achieve control crystallisation and composition of the absorber
3- interfacial engineering of the junction between the absorber layer and buffer layer, including replacement of Cd-based compounds.

The work programme is divided into two phases: Phase I - targeting high-efficiency standard substrate architectures, and Phase II - focused on Interface engineering for high-efficiency Cd-free architectures. We will combine solution-processing approaches with cutting-edge manufacturing tools such as atomic layer deposition to achieve accurate control of the semiconductor junction composition. Furthermore, we will assess the capacity of transferring these advanced manufacturing approaches to other supports such as composite materials.

To achieve the ambitious SolPV targets, three leading centres in CIGS and CZTS research are partnering with the Centre for Process Innovation Catapult to ensure that innovation is not only driven by device but also by scalable manufacturing. The consortium also includes industrial partners supporting critical areas of the work programme.